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Featured Article
FREESCALE SEMICONDUCTOR DEPLOYS ADVANCED
TECHNOLOGY FOR ACHIEVING NEXT GENERATION
DEVICE QUALITY AND RELIABILITY WITH KINESYS
TEST ADVANTAGE’S STREEWISE™ SOFTWARE
TEMPE, AZ. — December 2, 2009 – Freescale and Kinesys Test Advantage announced today that they have implemented breakthrough technology that removes the historical “wall” between in process wafer manufacturing data and die electrical test data in order to target hybrid automotive quality requirements.
Automotive device supplier Freescale Semiconductor located in Toulouse, France is driving quality and reliability levels to ever higher standards in its manufacturing operations by employing Streetwise™, an innovative software technology from Arizona-based Kinesys Test Advantage. Streetwise is a unique
software platform that provides advanced multi process flow data analysis capabilities for exposing semiconductor device performance marginalities, thereby dramatically improving overall device quality and reliability.
Zero defect programs have become a norm in the automotive industry where quality is critical to the safety and reliability of a company’s products.
Freescale and Kinesys Test Advantage have combined their respective expertise and technology to extend statistical post processing analysis to include wafer sort electrical test screenings, final outgoing inspection and in-process wafer fab parameters. Automatic multi-flow and across flow analysis of these new data sources generated from as many as ten (10) wafer manufacturing process flows will allow achievement of unprecedented quality levels for next generation automotive applications.
Historically, there have been incredible amounts of wafer fab parametric data (average ratio 1/10; one electrical test for ten in process wafer fab measurements) that have been used solely to monitor the wafer manufacturing processes. This same wafer fab data is a rich source of information that has not been leveraged to its full potential. Typically, in-process wafer fab measurements are stored into a database for lot processing traceability and process control. Freescale and Kinesys Test Advantage have implemented unique smoothing algorithms in order to translate sampled data from in-process wafer fab
measurements into in-process die measurements without adding extra controls in the wafer fab. This development allows die level screening and detection of potential marginal device performance through multi-flow analysis classification rules based on statistical post processing.
“Freescale is now post processing twenty-four (24) wafer lots in a matter of minutes with up to ten (10) flows of in-process and electrical test die data per wafer in a single pass using Streetwise™, whereas historically if this same comprehensive analysis were performed, it could take up to two (2) weeks,” stated Frederic Tilhac, Kinesys Test Advantage Technical Program Manager.
“By incorporating wafer fab data using Streetwise advanced multi-flow analysis and device classification strategies, we are confident in our ability to meet our customers’ demands for the next generation automotive quality standards demanded by our hybrid application markets and improve our manufacturing processes,” said Alain Deram, Technical Director of Power Technology at Freescale Semiconductor”.
“Freescale’s deployment of Streetwise for their leading edge product applications is a tribute to our advanced technology that enables our customers to achieve next generation quality levels demanded by future automotive applications.” commented Fabrice Dechoux, CEO of Test Advantage. “Streetwise is a unique, production-proven platform that enhances any device manufacturer’s competitive advantage.”
About Freescale Toulouse: The Freescale Toulouse facility was built in 1967 and is not only a semiconductor manufacturing site but also includes R&D, Sales and Marketing targeting Analog / Mixed-mode Power ICs and RF chips for automotive and networking infrastructure.
About Kinesys Test Advantage: In 2008, Test Advantage Software joined forces with Kinesys and formed Kinesys Test Advantage (KTA). Kinesys Test Advantage is a leading supplier of software based quality improvement and single device tracking (SDT) tools. KTA software incorporates a complete, fully automated production solution when combined with direct equipment connection to both test and assembly process elements. KTA technology empowers users in all areas of single device tracking and integrated statistical post-test processing analysis of manufacturing data. The Tempe, Arizona based company maintains offices throughout the world.
More information about Kinesys Test Advantage is available at www.kinesystestadvantage.com.
Test Advantage ®, Kinesys Test Advantage™, Streetwise™, Streetwise™ Production,Streetwise™ Engineering are trademarks or registered trademarks of Test Advantage, Inc. in the United States and in other countries. Other product and or service names mentioned herein may be trademarks of the companies with which they are associated.
Media Contact:
Greg LaBonte
Phone: 480-337-3363
greg.labonte@testadvantage.com
2009
December 2, 2009
KINESYS SOFTWARE AND TEST ADVANTAGE JOIN
FORCES TO FORM KINESYS TEST ADVANTAGE
TEMPE, AZ. — December 2, 2009 - Test Advantage Software and Kinesys Software have combined their respective technology development roadmaps into a new entity, to be known as Kinesys Test Advantage. The joining of the two companies leverages the synergies of Kinesys’ Single Device Traceability and Test Advantage’s Advanced Semiconductor Device Variability detection technologies into a fully integrated production solution, enabling existing joint customers and the broader marketplace to take advantage of this fully integrated solution for employing advanced feed forward Adaptive Test Strategies.
The two parties have committed to the semiconductor device manufacturing marketplace to provide fully integrated ‘end to end’ product solutions that are deployed throughout the backend semiconductor manufacturing operations, and targeted to improve production efficiencies, reduce DPPM levels, and enable single device traceability while facilitating open data standards.
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October 2009
Single device tracking for feed forward adaptive test
SAN JOSE, CA.- October 1, 2009, KGD Conference: Greg LaBonte - KINESYS Test Advantage -It is clear that new innovative manufacturing methodologies must be applied during the back-end wafer sort, final test, and assembly processes in order to reduce manufacturing costs while continuing to improve outgoing device quality.
While wafer sort is focused on testing device yield to specification, advanced statistical post processing methodologies compliment this process with testing yield based on wafer fabrication and assembly process performance. Combine the strengths of these data sets along with end to end single device traceability throughout the backend manufacturing process and you have an adaptive test opportunity to reduce device manufacturing costs and at the same time improve device quality.
Device Traceability throughout the back-end process from wafer parametric test through final test now provides a backbone to facilitate correlations between the advanced statistical post processing data and all subsequent process steps in order to optimize equipment utilization and improve device quality.
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2008
August 2008
Tempe-Based Test Advantage Named to the Inc. 5000 for Second Year in a Row
Company Ranked Number 4868 in 2008 Inc. 5000 List of Fastest-Growing Private Companies in America
NEW YORK, NY./ TEMPE, AZ. - August 20, 2008 – For the second successive year, Inc. has named Test Advantage, Inc. in its Inc. 5,000 list of fastest-growing private companies in the United States.
Test Advantage, a leading supplier of both custom-configured Automated Test Equipment (ATE) and innovative software technology tools for semiconductor testing, was founded in 1997 and has enjoyed significant and sustained growth. The company was ranked number 3,110 in the Inc. 5,000 in 2007. The Inc. 5,000 award is focused on revenue growth over the last few years, which for Test Advantage has continued to be strong, driven by the company’s established and growing market share of its hardware and software activities. Since its inception, Test Advantage has shipped several hundred quality ATE systems and ATE upgrades and licensed thousands of software nodes to its customers worldwide.
“To be ranked once again amongst the fastest growing private companies is a considerable achievement for our company,” commented Fabrice Dechoux, CEO of Test Advantage. “That we have been able to maintain a growth rate worthy of the Inc. 5,000, even though we are now in our 12th business year, is testament to the dedication of our team in maintaining our position as the premier resource for semiconductor test capacity and technology.”
“Our second annual Inc. 5000 continues the most ambitious project in business journalism,” said Inc. 5000 Project Manager Jim Melloan. “The Inc. 5000 gives an unrivalled portrait of young, underreported companies across all industries doing fascinating things with cutting-edge business models, as well as older companies that are still showing impressive growth.”
Methodology
The 2008 Inc. 5000 list measures revenue growth from 2004 through 2007. To qualify, companies must be U.S.-based and privately held, for profit, independent– not subsidiaries or divisions of other companies – as of December 31, 2007, and have had at least $200,000 in revenue in 2004, and $2 million iin 2007. Companies can apply for next year’s Inc. 5000 by registering with “IncBizNet, Business
Network for Private Companies”, at www.incbiznet.com.
About Test Advantage, Inc.
Founded in 1997, Test Advantage® offers hardware and software solutions to the semiconductor industry through its Quality ATE Division and its Software Products Division. Combining 100-plus years of in-house test hardware and software for test expertise, the company delivers a competitive edge to all of its clients. The Quality ATE Division specializes in rebuilt, Configured-to-Match™ ATE systems. The Software Products Division develops and deploys leading-edge, proprietary software to automate manufacturing quality and throughput improvements throughout the manufacturing test process. The Tempe, Arizona-based company operates worldwide, maintaining offices in Germany, France and Singapore. More information about Test Advantage Inc. is available at http://www.testadvantage.com.
About Inc.com
Inc.com, the daily resource for entrepreneurs, delivers how-to guides, advice, tools, breaking news, and rich multi-media to help business owners and CEOs start, run, and grow their businesses. Inc.com offers dynamic marketing solutions to help advertisers effectively reach Inc.com's audience of business leaders. Visit http://www.inc.com.
Media Contact:
Martijn Pierik
Impress Public Relations
602-366-5599
martijn@impress-pr.com
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February 2008
Test Advantage is recognized as a key provider in enabling Adaptive Test Strategies within the semiconductor test environment
TEMPE, AZ-FEBRUARY 18, 2008: The 2007 International Test Conference brought significant emphasis to the growing demand for employing “Adaptive Test” strategies to optimize semiconductor test, both in terms of cost and quality. A common thread exposed during multiple sessions at the ITC conference, and among key members attending a Die Products Consortium session held during that same week, was the compelling benefits for leveraging Advanced Variance Detection data for improving the semiconductor test processes. Historically, outlier detection methods may have only been considered economically viable in operations that demanded extreme quality standards dictated by “Zero Defect” initiatives associated with specific markets such as Automotive and Medical. These conference sessions rationalized broad market appeal for employing Adaptive Test strategies leveraging Advanced Variance Detection classification methods for both commercial and high reliability markets.
Test Advantage was honored to participate as an invitee to the DPC session and was pleased to witness continued significant reinforcement from the DPC organization for Advanced Variance Detection techniques which could be leveraged in feed forward test strategies. Test Advantage is a world proven leader in providing a user definable Advanced Variance Detection platform that integrates easily within existing semiconductor manufacturing operations.
The text of the press release from the Die Products Consortium session is included below. To learn more about Advanced Variance Detection methodologies, or to facilitate effective deployment of Adaptive Test strategies within your test operation, drop us an email info@testadvantage.com or visit our website at www.testadvantage.com.
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the article>
May 2008
ATest Advantage participated as a Bronze Sponsor in the 2008 IEEE European Test Symposium held in Lago Maggiore, Italy May 25-29, 2008
Lago Marggiore, Itlay-May 26, 2008: Frederic Tilhac, European Technical Program Manager for Test Advantage Software Products, presented a comprehensive paper during the “Test Engineering” Vendor Session addressing all the key elements for implementing an effective DPPM improvement program.
Effective DPPM improvement programs require test program qualification and post-probe data analysis.
The need for quality improvement in semiconductor manufacturing processes has continued to be driven by customer demands for improved product reliability. Sort test yield impacts have made it apparent to the semiconductor IDMs that DPPM improvement programs must comprehend effectiveness and efficiency when employing outlier detection methodologies. Competitive pressure for suppliers to improve both cost and quality is now being driven from broader markets than the traditional automotive markets. It is realized that cross departmental sort test functions must leverage joint efforts in order to implement the most effective solutions. Combined data analysis strategies in both device test program development and manufacturing post-test data analysis are elemental in this solution.
<view the article>
February 2008
Test Advantage is recognized as a key provider in enabling Adaptive Test Strategies within the semiconductor test environment
TEMPE, AZ-FEBRUARY 18, 2008: The 2007 International Test Conference brought significant emphasis to the growing demand for employing “Adaptive Test” strategies to optimize semiconductor test, both in terms of cost and quality. A common thread exposed during multiple sessions at the ITC conference, and among key members attending a Die Products Consortium session held during that same week, was the compelling benefits for leveraging Advanced Variance Detection data for improving the semiconductor test processes. Historically, outlier detection methods may have only been considered economically viable in operations that demanded extreme quality standards dictated by “Zero Defect” initiatives associated with specific markets such as Automotive and Medical. These conference sessions rationalized broad market appeal for employing Adaptive Test strategies leveraging Advanced Variance Detection classification methods for both commercial and high reliability markets.
Test Advantage was honored to participate as an invitee to the DPC session and was pleased to witness continued significant reinforcement from the DPC organization for Advanced Variance Detection techniques which could be leveraged in feed forward test strategies. Test Advantage is a world proven leader in providing a user definable Advanced Variance Detection platform that integrates easily within existing semiconductor manufacturing operations.
The text of the press release from the Die Products Consortium session is included below. To learn more about Advanced Variance Detection methodologies, or to facilitate effective deployment of Adaptive Test strategies within your test operation, drop us an email info@testadvantage.com or visit our website at www.testadvantage.com.
View
the article>
2007
November 2007
TEST ADVANTAGE APPOINTS TERADYNE VETERAN
DOUG ELDER AS SENIOR VICE PRESIDENT
TEMPE, AZ— NOVEMBER 26, 2007: Test Advantage Inc. announced today that Teradyne veteran Doug Elder has joined the company as Senior Vice President of its Hardware Division, responsible for the Teradyne value-added reselling activity.
Mr. Elder comes to Test Advantage from Teradyne, where he spent 22 year in various roles at the company. Starting in 1985 as a Sales Engineer, Mr. Elder worked upwards within the organization, serving most recently as Vice President and General Manager of the Semiconductor Test Business from 2003 to 2007.
Commenting on the appointment, Fabrice Dechoux said: “Doug Elder brings many years of senior executive level experience with Teradyne to Test Advantage in the form of market knowledge, customer relationships and platform expertise. His addition to our senior management team is of significant value to Test Advantage, as the largest Teradyne value-added equipment re-seller, and positions us perfectly to grow our Teradyne business still further.”
<View the article >
September 2007
Tempe-Based Test Advantage Ranks Number 3110 on the 2007 Inc. 5,000
With Three-Year Sales Growth of 103 Percent.
NEW YORK, NY/ TEMPE, AZ. - September 21, 2007 – Inc. ranked Test Advantage number 3,110 on its first-ever Inc. 5,000 list of the fastest-growing private companies in the country. The Inc. 5,000, an extension of Inc. magazine’s annual Inc. 500 list, catches many businesses that are too big to grow at the pace required to make the Inc. 500, as well as a host of smaller firms.
Test Advantage Inc. is a leading supplier of both custom-configured Automated Test Equipment (ATE) and innovative software technology tools for semiconductor test. Since it was founded in 1997, Test Advantage has experienced pronounced periods of growth, winning the 2001 Ernst & Young Entrepreneur of the Year award in part for rapid growth during the period 1997 - 2000. The Inc. 5000 award is focused on revenue growth over the last few years, which continues to be strong, driven by Test Advantage's established and growing market share in its hardware and software activities.
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April 2007
Automotive Semiconductor Device Suppliers Demonstrate Maturity in Driving Zero Defect Initiatives at Wafer Sort.
TEMPE, ARIZONA: Greg LaBonte, Software Product Manager, Test Advantage. Today, electronic systems account for more than 20 percent of the value of a new automobile, and that figure is expected to increase to more than 40 percent by 2010 . The desire to increase reliability in this competitive marketplace, along with ensuring that safety liabilities are under control, have acted as significant catalysts for automotive device manufacturers to aggressively pursue “Zero Defect” semiconductor device manufacturing strategies.
View the article >
March 2007
TEST ADVANTAGE’S STREETWISE™ TECHNOLOGY SELECTED BY TOYOTA MOTOR CORPORATION TO SUPPORT ZERO DEFECTS PROGRAM.
Manufacturing Excellence, Device Reliability and Customer Satisfaction Drive Decision
TEMPE, AZ—Test Advantage Inc. announced today that Toyota Motor Corporation has purchased Streetwise™, a unique software platform that provides a suite of tools for decreasing semiconductor manufacturers’ Defective Parts Per Million (DPPM) rates, thereby enhancing overall device quality and reliability.
Zero defect programs have become a norm in the auto industry where quality and yield are critical to the safety and reliability of a company’s products, and its bottom line. Test Advantage has been at the forefront of software solutions to reduce DPPM in semiconductor manufacturing. The Test Advantage Software Division is driven by the desire to help its customers attain ZERO defects in production.
“Toyota’s selection of Streetwise is a testament to the continued success of the technology and its ability to help achieve DPPM improvement and overall device reliability without compromising manufacturing cost effectiveness,” commented Fabrice Dechoux, CEO of Test Advantage. “Streetwise is a unique, production-proven platform that enhances any device manufacturer’s competitive advantage.”
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2006
May 2006
Test Advantage presents with ST Microelectronics at the 2006 Automotive Electronics Conference
INDIANAPOLIS, INDIANA: May 9-11 Test Advantage and ST Microelectronics jointly present “An Industrialization Program for DPPM Improvement,” a compelling paper outlining the benefits of global deployment of Test Advantage’s Streetwise™ technology.
View the abstract >
May 2006
Test Advantage participates in the 2006 Teradyne User Group Vendor Forum
PONTE VEDRA BEACH, FLORIDA: May 1-3 The Teradyne Users Group (TUG) Conference is run by an annually elected steering committee of Teradyne customers, with Teradyne appointed delegates. This Conference consists of technical papers, panel and poster sessions, as well as tutorials that present the latest in Test Technology.
June 2006
Test Advantage presents “Highly efficient DPPM improvement programs depend on pre-production and post-probe data analysis” at the 2006 Semiconductor Wafer Test Workshop.
SAN DIEGO, CALIFORNIA: June 11-14 The Semiconductor Wafer Test Workshop is the only IEEE/CS sponsored event that focuses on all the aspects associated with microelectronic wafer and die level testing. The conference has a mixture of manufacturer and vendor presentations. It is not a sales show, nor an academic or theoretical conference. It is a probe technology forum where attendees come to learn about recent developments in the industry and exchange ideas.
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2005
April 2005
Test Advantage presents at the 2005 Automotive Electronics Council Reliability Workshop
DETROIT, MICHIGAN: Test Advantage presents “Beyond PAT: Automatic Identification and Removal of Parametric Outliers in Semiconductor Test Data” at the 2005 Automotive Electronics Council Reliability Workshop in Detroit, Michigan, April 25th to 28th. Automotive device manufacturers are particularly interested in the quality enhancing benefits of Test Advantage’s Streetwise™ and Express™ tools.
View the abstract >
May 2005
Test Advantage presents at the 2005 Teradyne User Group Conference
SCOTTSDALE, ARIZONA: Test Advantage presents “An Automated Engineering Approach to Finding the Hidden Treasures Within Test Data” at the 2005 Teradyne User Group Conference, Vendor Forum in Scottsdale, Arizona, May 1st-4th.
View the abstract >
Nov 2005
Test Advantage’s Next Generation Streetwise™ Technology Maximizes DPPM Reductions: Adds Multi-flow to Comprehensive Outlier Detection
TEMPE, ARIZONA: November 17, 2005 — Test Advantage Inc., a technology leader providing automated, comprehensive, in-line data analysis technology for the semiconductor industry, unveiled today its next generation Streetwise™ Production and Streetwise™ Engineering software solutions at the opening of the annual International Test Conference (ITC) here in Austin, Texas. This latest generation of the Streetwise Production and Streetwise Engineering tools complements previously released product functions for detecting parametric and geographical outliers, with additional support for multi-process flow analysis and multi-process flow bin map merge capabilities. Streetwise has maintained its unique, leading-edge outlier device identification methodologies, which provide the user with unprecedented confidence in outlier device detection and validation so that users do not scrap good devices or unnecessarily sacrifice production yield.
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June 2005
Test Advantage presents at the 2005 Southwest Test Workshop
SAN DIEGO, CALIFORNIA: Test Advantage presents "Analysis of EWS Test Data for Reliability Improvement through Outlier Detection and Automated Ink Map Generation" at the 2005 Southwest Test Workshop, June 5th-8th.
View the abstract >
2004
June 2004
Test Advantage Presents at the Southwest Test Workshop
SAN DIEGO, CALIFORNIA: Test Advantage presents “Dynamic Outlier Algorithm Selection for Quality Improvement and Test Program Optimization” at the 2004 Southwest Test Workshop, an annual industry forum focused on the particular challenges of wafer test.
View the abstract >
2003
May 2003
Test Advantage Presents at the Teradyne User Group
NASHVILLE, TENNESSEE: Test Advantage presents "Testing Field Programmable Analog Array on a Digital Platform" at the 2003 Teradyne User Group meeting. This paper will detail the challenges presented in testing a Field Programmable Analog Array on a low-cost digital platform, and some innovative methods for success.
